SV5C-DPTXCPTX

BERT/SerDes Testers

Quick Overview

Combo MIPI D-PHY/C-PHY generator — ultimate product for dual roadmap development

Call For Availability


Customize SV5C-DPTXCPTX
SV3C-DPTXCPTX   +

* Required Fields

Your Customization
SV5C-DPTXCPTX
SV5C-DPTXCPTX

In stock

Summary
    More Information
    name SV5C-DPTXCPTX
    Description Combo MIPI D-PHY/C-PHY generator — ultimate product for dual roadmap development
    Series SV3C Series
    Max Data Rate 80.0 Gbps D-PHY / 6.5 Gsps C-PHY
    Min Data Rate 80.0 Mbps D-PHY / 80.0 Msps C-PHY
    Clock Inputs 1
    Clock Outputs 2
    Differential Voltage Output 10mV - 600mV D-PHY / 400mV - 5mV C-PHY /
    Pattern Capability Flexible pattern architecture allows for the generation of encoded PHY data, unencoded PHY data, or entire CSI/DSI frames
    User Programmable Pattern Memory 8 Gbyte
    Configuration MIPI C-PHY/D-PHY Gen Bundle

    Quick Overview

    Features 

  • Any-rate operation to 8.0 Gbps per lane (D-PHY) and 6.5 Gsps per trio (C-PHY)
  • Per-lane HS voltage level and common-mode control
  • Per-lane LP voltage level control
  • Per-lane skew injection with < 1 ps resolution
  • Per-lane multi-source jitter injection
  • State-of-the-art programming environment based on the highly intuitive Python language
    Applications include:
  • Parallel physical layer validation
  • DSI and CSI packet and protocol testing
  • Plug-and-play system-level validation
  • .