Simultaneous characterization of entire server CPU links

The M Series line introduces a new class of massively parallel SerDes validation testers that are ideal for high-volume data collection and characterization. Constructed using a collection of Introspect Technology’s D Series modules that are operated seamlessly using the Introspect ESP software, these massively parallel testers are able to interface to high-speed devices in their entirety. Look at a typical Applications Processor for example, and you will quickly realize that it is wrapped completely in high-speed interfaces with hundreds of lanes. The M Series is the only solution in the industry that is able to fully test all of these interfaces rapidly and accurately.

KEY FEATURES AT A GLANCE

• Up to 112 pattern generators and 112 error detectors per tester
• Up to 32 Gbps per lane
• Complete suite of characterization features including jitter injection, jitter measurement, equalization control and analysis, clock recovery, and bit error rate testing
• Device test bus control using a built in vector sequencer or using industry standard bus control tools
• Device manipulator and handler control within an integrated software environment

IDEAL FOR